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<title>KORTESTW/KORTESTB/KORTESTQ/KORTESTD—OR Masks And Set Flags </title></head>
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<h1>KORTESTW/KORTESTB/KORTESTQ/KORTESTD—OR Masks And Set Flags</h1>
<table>
<tr>
<th>Opcode/Instruction</th>
<th>Op/En</th>
<th>64/32 bit Mode Support</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>VEX.L0.0F.W0 98 /r KORTESTW k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512F</td>
<td>Bitwise OR 16 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
<tr>
<td>VEX.L0.66.0F.W0 98 /r KORTESTB k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512DQ</td>
<td>Bitwise OR 8 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
<tr>
<td>VEX.L0.0F.W1 98 /r KORTESTQ k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512BW</td>
<td>Bitwise OR 64 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
<tr>
<td>VEX.L0.66.0F.W1 98 /r KORTESTD k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512BW</td>
<td>Bitwise OR 32 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr></table>
<h3>Instruction Operand Encoding</h3>
<table>
<tr>
<td>Op/En</td>
<td>Operand 1</td>
<td>Operand 2</td></tr>
<tr>
<td>RR</td>
<td>ModRM:reg (w)</td>
<td>ModRM:r/m (r, ModRM:[7:6] must be 11b)</td></tr></table>
<h2>Description</h2>
<p>Performs a bitwise OR between the vector mask register k2, and the vector mask register k1, and sets CF and ZF based on the operation result.</p>
<p>ZF flag is set if both sources are 0x0. CF is set if, after the OR operation is done, the operation result is all 1’s.</p>
<h2>Operation</h2>
<p><strong>KORTESTW</strong></p>
<pre>TMP[15:0] (cid:197) DEST[15:0] BITWISE OR SRC[15:0]
IF(TMP[15:0]=0)
    THEN ZF (cid:197) 1
    ELSE ZF (cid:197) 0
FI;
IF(TMP[15:0]=FFFFh)
    THEN CF (cid:197) 1
    ELSE CF (cid:197) 0
FI;</pre>
<p><strong>KORTESTB</strong></p>
<pre>TMP[7:0] (cid:197) DEST[7:0] BITWISE OR SRC[7:0]
IF(TMP[7:0]=0)
    THEN ZF (cid:197) 1
    ELSE ZF (cid:197) 0
FI;
IF(TMP[7:0]==FFh)
    THEN CF (cid:197) 1
    ELSE CF (cid:197) 0
FI;</pre>
<p><strong>KORTESTQ</strong></p>
<pre>TMP[63:0] (cid:197) DEST[63:0] BITWISE OR SRC[63:0]
IF(TMP[63:0]=0)
    THEN ZF (cid:197) 1
    ELSE ZF (cid:197) 0
FI;
IF(TMP[63:0]==FFFFFFFF_FFFFFFFFh)
    THEN CF (cid:197) 1
    ELSE CF (cid:197) 0
FI;</pre>
<p><strong>KORTESTD</strong></p>
<pre>TMP[31:0] (cid:197) DEST[31:0] BITWISE OR SRC[31:0]
IF(TMP[31:0]=0)
    THEN ZF (cid:197) 1
    ELSE ZF (cid:197) 0
FI;
IF(TMP[31:0]=FFFFFFFFh)
    THEN CF (cid:197) 1
    ELSE CF (cid:197) 0
FI;</pre>
<h2>Intel C/C++ Compiler Intrinsic Equivalent</h2>
<p>KORTESTW __mmask16 _mm512_kortest[cz](__mmask16 a, __mmask16 b);</p>
<h2>Flags Affected</h2>
<p>The ZF flag is set if the result of OR-ing both sources is all 0s.</p>
<p>The CF flag is set if the result of OR-ing both sources is all 1s.</p>
<p>The OF, SF, AF, and PF flags are set to 0.</p>
<h2>Other Exceptions</h2>
<p>See Exceptions Type K20.</p></body></html>